LLVM Weekly - #27, Jul 7th 2014
Welcome to the twenty-seventh issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects.LLVM Weekly is brought to you by Alex Bradbury.Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to email@example.com, or @llvmweekly or @asbradbury on Twitter.
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News and articles from around the web
An LLVM code generator has been merged into the MLton whole-program optimizing compiler for Standard ML. This was written by Brian Leibig as part of his Master's thesis, which contains more information on its performance and design.
Eli Bendersky has written a tool which converts the output of Clang's
-ast-dump to HTML. See here for an example. The code is available on Github.
Clang's Microsoft Visual C++ compatibility page has been updated to reflect the status of the current SVN trunk. As can be seen from the relevant diff, record layout has been marked complete along with RTTI. Lambdas are now marked mostly complete.
On the mailing lists
Edwin Amsler is interested in producing an LLVM backend for the 6502 processor. He later starts a thread asking for advice on targeting a CPU with no general purpos registers. David Given suggests it might be worth viewing the 6502 as a machine with 256 byte-sized registers.
Pavel Chupin has written to the list on behalf of Intel to get feedback on upstreaming support for the x32 ABI. As you might expect, people are in favour of the idea. The NativeClient team are also interested, particularly as NaCl's x86-64 ABI is fairly similar to x32.
Sunil Srivastava has shared a proposal for an ABI test suite for Clang. There is wide support for Sony submitting the implementation for code review. A later response clarifies that of the 400 test files, about 20% are hand-written and the rest come from the test case generator.
In a thread about using the Clang API to extract information about the memory layout of structs, Reid Kleckner points to the handy -fdump-record-layouts flag.
There's a massive thread on the usability of Phabricator review threads for non-Phabricator users. There seem to be some issues with email reviews showing up on Phabricator and possibly vice-versa. There's more than I have time to summarize, so those interested are advised to read the thread.
The X86 backend now expands atomics in IR instead of as MachineInstrs. Doing the expansions at the IR level results in shorter code and potentially there may be benefit from other IR passes being able to run on the expanded atomics. r212119.
The ARM backend learned the ISB memory barrier intrinsic. r212276.
The X86 backend gained support for
__builtin_ia32_rdpmcwhich is used to read performance monitoring counters. r212049.
The peephole optimizer gained new code (currently disabled) to rewrite copies to avoid copies across register banks. r212100.
Control flow graph building code has been moved from MC to a new MCAnalysis library. r212209.
TableGen gained support for MSBuiltin, which allows for adding intrinsics for Microsoft compatibility. r212350.
MSVC RTTI (run-time type information) implementation has been completed. r212125.
__builtin_arm_stlexintrinsics were added. r212175.
Nested blocks are now supported in Microsoft inline assembly. r212389.