LLVM Weekly - #14, Apr 7th 2014
Welcome to the fourteenth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to email@example.com, or @llvmweekly or @asbradbury on Twitter.
There seems to have been a flood of LLVM-related news this week, hopefully I've managed to collect it all. If you're in London next week, you might be interested in attending my introductory LLVM talk on Wednesday. Abstract is here.
EuroLLVM is of course taking place on Monday and Tuesday of this week. Sadly I won't be in attendance. If anyone is blogging the event, please do send me links.
The canonical home for this issue can be found here at llvmweekly.org.
News and articles from around the web
An independent, non-profit LLVM Foundation is to be formed. As a vendor neutral organisation it will represent the community interest and aims to be set up by the end of the year.The initial board of directors will be Vikram Adve, Chandler Carruth, Doug Gregor, David Kipping, Anton Korobeynikov, Chris Lattner, Tanya Lattner, and Alex Rosenberg.
Rust 0.10 has been released. See also the discussion on Hacker News and Reddit. Rust is a systems programming language from Mozilla which uses LLVM as its code generator backend.
The Dagger LLVM-based decompilation framework has released its source as well as publishing a series of five articles documenting its implementation approach and documenting the next steps or 'TODOs'.
An LLVM backend for the Accelerate Array Language has been released. It compiles Accelerate code to LLVM IR and can target multicore CPUs as well as NVIDIA GPUs.
The PDF slidesfor a recent talk about the LLVM-based MalDiv diversifying compiler have been published. Such a tool effectively defeats signature-based matching of malware.
On the mailing lists
James Molloy from ARM has been looking at the recently open sourced ARM64 backend from Apple, and has come to the conclusion that it's easier to use ARM64 as a base an merge in from AArch64. The key justification is that ARM64 backend is more performant but has some correctness issues, and porting performance fixes is more difficult than correctness. There seems to be agreement from the followup responses. Bradley Smith reports good progress on fixing observed correctness issues and some interesting performance results. Of interest to those attending EuroLLVM this week, there will be discussions on Monday and after the main conference on Wednesday (details here).
Reid Kleckner has proposed a new tail call marker, 'musttail' which guarantees that tail call optimization will occur.
Shankar Easwaran starts a discussion on adding support to lld for demangling symbols.
Jeroen Dobbelaere has an interesting problem with an architecture he is targeting. The architecture has 64-bit registers, but the pointer size is always 32-bits. JF Bastien suggests this is similar to PNaCl and the x32 ABI.
Peter Collingbourne proposes an IR extension for loads/stores with deterministic trap/unwind behaviour. The aim is to support zero cost exception handling for operations that may trap. The proposal comes with initial patches, though Andrew Trick questions whether adding new IR instructions is the right approach.
The LLVM project Phabricator instance has been moved to reviews.llvm.org. Currently links to the old one are broken, but hopefully a redirect will be set up. By the time you read this I should have updated all broken links from llvmweekly.org.
MipsAsmParser and MipsOperand was rewritten. The improvements are documented in the commit message. r205292.
The ARM backend gained support for segmented stacks. r205430.
Windows on ARM support is now possible with the MachineCode layer. r205459.
X86TargetTransformInfo gained getUnrollingPreferences, which is used by the generic loop unroller. This helps to optimise use of the micro-op caches on X86. This produced 7.5%-15% speedups in the TSVC benchmark suite. r205348.
ARM gained a nice little optimisation pass that removes duplicated DMB instructions. r205409.
Atomic ldrex/strex loops are now expanded in IR rather than at MachineInstr emission time. This cleans up code, but should also make future optimisations easier. r205525.
The OpenMP 'copyin' clause was implemented. r205164.
The 'optnone' attribute was added, which suppresses most optimisations on a function. r205255.
The heuristics for choosing methods to suggest as corrections were improved, to ignore methods that obviously won't work. r205653.
The 'BitwiseConstraintManager' idea was added to the open projects page. r205666.