LLVM Weekly - #92, Oct 5th 2015
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News and articles from around the web
Most of the presentation materials from CppCon2015 are now online. Talks that may be of particular interest include Kostya Serebryany on fuzzing with libFuzzer, Piotr Padlewski on C++ devirtualization in Clang, and JF Bastien talking about C++ on the web.
Rafael Espíndola wrote in to share an impressive milestone for the new LLD ELF linker. It can now link itself and all of LLVM and Clang (though not all tests pass, and you must use
LLVM_ENABLE_THREADS=OFF). Things will of course get really interesting once LLD matures if it can compete with Gold in terms of speed.
The next Paris LLVM social will take place on October 15th. Calixte Denizet will be talking about Scilab's usage of LLVM.
On the mailing lists
David Li has posted an update on efforts to reduce the overhead of profile-guided optimisation size overhead. He's produced an initial implementation of one of the proposals, which reduces the size of a release clang binary with coverage mapping from 986MB to 569MB.
It's a new month, so time for a new update on CMake's ability to replace autoconf in LLVM. As Chris says, we're getting very close now.
Tom Stellard has posted a proposed release schedule for LLVM/Clang 3.7.x point releases. The deadline to propose patches for 3.7.1 is November 2nd and November 30th for 3.7.2. Tom is also asking that people nominate patches using Phabricator rather than email.
Renato has kicked off a discussion on buildbot noise with a good summary of the issues and potential ways forward.
Chris Matthews is looking for feedback on how people are using orders in LNT, so as to better understand how to improve things. As he explains, the 'Order' is the SVN revision of the compiler.
Jeroen Ketema is asking if anyone has any objections to a change to ARM's NEON vld and vst intrinsics. The change would allow an address space to be associated with the pointer these intrinsics take.
Jonas Paulsson is curious about how to control selection of two-address vs three-address instruction forms. Several responses suggest just allowing three-address forms to be selected and have a late pass that converts to the two-address form where possible. Jonas has an interesting followup questions as to whether the register allocator will produce the maximum number of opportunities for this conversion.
A scheduler for the MIPS P5600 processor landed. r248725.
Align metadata for the load instruction was introduced. r248721.
Support for windows exception handling continues with support in AsmPrinter for 'funclets'. r248824.
Support landed for the HHVM JIT calling convention. r248832.
#includesorting functionality has been extended. r248782.